Electronic circuit devices are commonly used in both digital and analog circuits. In digital signal processing, signals change from one binary level to another. Such signals often become distorted due to resistance, capacitance, and/or inductance along its path on a circuit board. Moreover switching from one binary level to another often gives rise to still other distortions and spurious signals, e.g., noise, and induced signals on other electrical paths on the circuit board. In the art of circuit design and circuit board manufacturing, capacitors are commonly employed in order to reduce electromagnetic interference, decouple signals, reduce or dampen resonances, suppress current/voltage noise, improve signal quality, filter signals, and several further such purposes and/or functions.
Historically, discrete bypass capacitors have been used with specific active devices for high-frequency decoupling (e.g., resonance dampening, noise suppression, etc.) and still are employed when designers do not face space constraints. However, with the increased complexity of circuits and the reduction in the size of electronic products, the space on the surface of a circuit board is often limited and does not allow room for numerous surface mounted decoupling capacitors. Additionally, the electrical vias required by the discrete capacitors introduce unwanted parasitic inductance at higher frequencies. Consequently, an embedded decoupling capacitance (or buried capacitance) is typically used to eliminate the need for bypass capacitors mounted in the vicinity of each integrated circuit mounted to the board.
Attempts at providing embedded decoupling capacitance are known in the art. For example, in U.S. Pat. No. 5,079,069 to Howard et al, an integral buried capacitor is provided comprising a sheet of dielectric material that is sandwiched between two sheets of conductive material. Howard, thus, discloses a printed circuit board (PCB) that provides capacitance to each individual device by a portion of the capacitor laminate proportional to the individual device and borrowed capacitance from other portions of the capacitor laminate, depending upon the random operation of the devices.
While PCBs using an integrated capacitive laminate, such as the one disclosed by Howard et al., are generally successful in providing capacitance to a device, in certain applications the capacitance supplied by such integrated capacitive laminates is limited or insufficient. For example, because of their potential for interference and noise, certain high power, high switching speed integrated circuit (IC) devices often demand a decoupling capacitance that exceeds that which can be supplied by integrated capacitive laminates similar to those disclosed by Howard et al. In those circumstances, circuit designers employ additional localized, surface mounted capacitors in order to provide sufficient decoupling capacitance for the IC device. Such localized, surface mounted capacitors, however, are undesirable for the reasons discussed above.
Prior art capacitor laminates also suffers from a further deficiency in that the electronic device are all connected to the same embedded capacitive laminate, causing potential interference between devices. For instance, high power, high switching speed IC devices may cause significant voltage and/or current variations, or noise that potentially interferes with other low-noise devices on the circuit board that may also be coupled to the capacitive laminate.
In order to deal with the increased capacitance needs of high power, high switching speed IC devices, integrated capacitive laminates with increased capacitance have been developed, wherein several laminates are stacked together and connected in parallel. U.S. Pat. No. 6,739,027 to Lauffer et al., for example, discloses a capacitive PCB that is fabricated by taking a first conductive foil and coating both sides with a dielectric. Second and third conductive foils are also coated with a dielectric on one side and each foil is attached to the first dielectric coated foil by the uncoated side of the second and third foils. The second and third foils are each then laminated to a circuitized core creating four total capacitive planes that are connected in parallel with each other thereby increasing the capacitance density.
Thus, Lauffer et al., like Howard et al., provides a PCB that supplies capacitance to each individual device by a portion of the capacitor laminate proportional to the individual device and borrowed capacitance from other portions of the capacitor laminate, depending upon the random firing of the devices. Although Lauffer et al. increases the capacitive density, the devices still share the same capacitor laminate. Consequently, low-noise devices continue to be subject to interference from the noise produced by the high power, high switching speed IC devices described above.
Use of a thin dielectric layer made from powdered resin materials or filled resin systems are known in the art for their high dielectric constants that makes it possible to increase capacitance density. Lauffer et al. discloses a PCB incorporating the use of a thin, non-cured (B-stage) dielectric. However, the process of manufacturing stacked integrated capacitive laminates disclosed by Lauffer et al. becomes difficult when using these thin dielectrics. The nanopowder loading in thin dielectrics is very brittle and virtually impossible to manufacture without special handling and processing. Furthermore, using a thin dielectric creates the increased possibility that the conductive foils that sandwich the dielectric will have inclusions or voids that compromise the electrical integrity, creating a short in the capacitor and risk starting a fire. Testing for shorts is not possible until the stacked capacitive element is finished. If a defect is discovered the entire PCB must be scrapped, resulting in a potentially high monetary loss.
Thus, there remains a long felt need in the art for providing stacked integrated or embedded capacitors with very thin dielectric thickness and high Dk due to nanoloading on a circuit board capable of being connected in parallel in order to increase capacitance density or alternatively capable of providing separate capacitance for noisier devices and quieter devices. There is also a long felt need to identify faults and defects in a stacked capacitive core before adding subsequent core layers or circuit layers are added.